The when, why and how of waiting and backoff in multi-threaded applications on Arm
An Arm post on what a thread should do while it waits, whether on a lock or after a failed atomic. Spinning in a tight loop is the obvious move, but it floods memory with traffic and slows every other core touching the same location, so backing off helps both throughput and fairness. The post covers backoff strategies that space out the checks, and the Arm specific tools for them: the counter timer for timed waits, the WFET instruction on Armv8.7 and later that lets a core sleep for a set duration instead of burning power, and barriers like ISB and SB that control how far ahead the processor looks. It also lists patterns that look correct but are not, such as empty loops and simple LDXR plus WFE combinations, and explains why they fall apart as thread counts grow.