The when, why and how of waiting and backoff in multi-threaded applications on Arm
Article about what a thread on ARM CPU should actually do while it waits, whether spinning on a lock or retrying a failed atomic. The core observation is that contention comes from multiple threads touching the same cache line with at least one writer, so backing off cuts memory traffic and improves both throughput and fairness. The interesting part is the how: building delays from the counter timer, the ISB trick needed on older Armv8 cores, WFET on Armv8.7 for lower power, and a catalogue of approaches that look right but are not, including empty loops, YIELD, and SEVL plus WFE.